Visualize AND, OR, NOT, NAND, NOR, XOR gate operations with auto-generated truth tables. Explore half adder, full adder, and flip-flop circuits — the building blocks of digital computers.
Circuits
Select Gate
Toggle Inputs
A0
B0
0Y = A AND B
Half Adder Inputs
A
B
Full Adder Inputs
A
B
Cin
SR Inputs
S
R
Counter Control
GATE SYMBOL
TRUTH TABLE
AND Gate
Output is 1 only when both inputs are 1. Logical conjunction. Boolean: Y = A · B
Half Adder
Half Adder
Full Adder
Full Adder
SR Flip-Flop (SR Latch)
SR Latch
S
R
Q
Q̄
State
0
0
Q
Q̄
Hold
1
0
1
0
Set
0
1
0
1
Reset
1
1
—
—
Forbidden
2-Bit Counter (JK Flip-Flops)
Current Count
0
0
Decimal: 0
Theory & Key Formulas
Single gate: see the active gate's Boolean expression and truth table above.
Half adder: Sum = A ⊕ B, Carry = A · B.
Full adder: Sum = A ⊕ B ⊕ Cin, Cout = (A · B) + (Cin · (A ⊕ B)).
SR latch: S=1 sets Q=1, R=1 resets Q=0, S=R=0 holds, S=R=1 is forbidden.
2-bit counter: two JK flip-flops cycle 00 → 01 → 10 → 11 → 00.
What is a Logic Gate?
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What exactly is a logic gate? Are they like physical gates?
🎓
Basically, they're the tiny electronic switches that make up all digital computers. They take in one or two binary signals (0 or 1) and output a single binary signal based on a simple rule. In this simulator, you can click on the inputs (A, B) to toggle them between 0 and 1 and instantly see the output change.
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Wait, really? So the AND gate here only lights up the output when both inputs are on? That seems simple.
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Exactly! That's the power of it. Simple rules, combined, create complex behavior. For instance, try connecting the output of an AND gate to the input of an OR gate in the simulator's build area. You've just started building a circuit. The auto-generated truth table on the side will show you every possible outcome.
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What's the point of the XOR gate? It seems similar to OR but different in one case.
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Great observation! The XOR (exclusive OR) is crucial. It outputs 1 only if the inputs are different. This is the core of binary addition. In fact, drag an AND and an XOR gate together and connect the same inputs to both. You've just built a "Half Adder," the fundamental circuit for adding two bits. Watch how the Sum and Carry outputs match binary addition.
Physical Model & Key Equations
The behavior of a logic gate is defined by its Boolean function, which maps binary inputs to a binary output. The fundamental gates are defined by these truth tables and equations.
$$
\begin{align*}\text{AND:}& \quad Y = A \cdot B \\
\text{OR:}& \quad Y = A + B \\
\text{XOR:}& \quad Y = A \oplus B = A\overline{B}+ \overline{A}B \\
\text{NOT:}& \quad Y = \overline{A}\end{align*}$$
Where A, B are binary inputs (0 or 1), Y is the binary output, $\cdot$ denotes AND (multiplication), $+$ denotes OR (addition), and $\overline{A}$ denotes NOT (inversion).
Combining gates creates functional circuits. The Half Adder, which adds two bits, is built from an XOR and an AND gate. Its outputs define the Sum (the least significant bit of the result) and the Carry (which is passed to the next digit).
$$
\begin{align*}\text{Sum}&= A \oplus B \\
\text{Carry}&= A \cdot B
\end{align*}
$$
Here, Sum is the result of the addition modulo 2, and Carry is 1 if both inputs are 1, indicating the result is 10 in binary (2 in decimal).
Frequently Asked Questions
A half adder adds two 1-bit inputs (A, B) and outputs Sum and Carry. In contrast, a full adder also accepts a carry input (Cin) from a lower bit and adds three 1-bit inputs. By connecting multiple full adders, a multi-bit addition circuit can be constructed. Try comparing the behavior of both using the simulator's presets.
The simulator automatically enumerates all input patterns (combinations of 0 and 1) for the selected logic gates or circuit, calculates the output for each input, and displays them in a table format. For example, for a 2-input gate, 4 combinations are generated; for a 3-input gate, 8 combinations are generated instantly, allowing you to verify circuit behavior without manual calculation.
The presets include circuits for typical RS flip-flops and D flip-flops, visualizing the state retention mechanism using NAND and NOR gates. You can observe how the output changes in response to clock signals and input variations while tracking timing, enabling an intuitive understanding of the basics of memory circuits.
The output of each gate displays the corresponding Boolean expression (e.g., for AND, Y = A·B). Additionally, for composite circuits like a half adder, expressions such as Sum = A⊕B and Carry = A·B are automatically linked, allowing you to compare wiring and formulas while learning. It is recommended to change input values and verify whether the output matches the expression, along with the truth table.
Real-World Applications
Arithmetic Logic Units (ALUs): Every processor has an ALU that performs calculations. It's built from networks of adders (made from logic gates) that handle addition, subtraction, and logical comparisons. The circuits you build in the simulator are the direct conceptual ancestors of these components.
Memory & Data Storage: A flip-flop circuit, which you can explore in the simulator, is a 1-bit memory cell. It uses feedback from its outputs to its inputs to "remember" a state. Billions of these, in the form of SRAM, are used for CPU cache memory.
Control Systems & Decision Making: Logic gates form the backbone of digital control. For instance, a car's airbag controller uses an AND gate: if (crash sensor = 1) AND (seat occupied = 1), then DEPLOY = 1. Simple gates make critical, real-time decisions.
Digital Communications & Error Checking: Parity checkers, used to detect errors in data transmission (like over Wi-Fi or in RAM), are built from XOR trees. They calculate whether the number of 1s in a data packet is even or odd, signaling if a bit was flipped during transmission.
Common Misconceptions and Points to Note
When you start playing with the simulator, there are a few common pitfalls. First, the tendency to think "gate operations complete instantaneously". In actual electronic circuits, it takes an extremely small amount of time (propagation delay) for a signal to propagate. This simulator assumes ideal, instantaneous operation, but in reality, timing mismatches can cause malfunctions. For example, when writing data to a flip-flop, if the clock signal and data signal are misaligned by just a few nanoseconds, an unintended value can be stored.
Next, handling unused inputs. When using ICs in practice, leaving unused input pins unconnected is absolutely unacceptable. Especially with NAND or NOR gates, if an unused input is left "floating," it can be affected by noise and interpreted as an unintended 0 or 1, making the output unstable. You must always connect them to a logically defined voltage (VCC or GND) via a pull-up or pull-down resistor. Keep in mind that this "floating" state cannot be reproduced in the simulator.
Finally, "real-world characteristics" that don't behave as theory suggests. The gates in the simulator have infinite drive capability, but actual ICs have a fan-out limit (the number of inputs a single output can drive). For instance, if you connect one gate's output to 10 other gate inputs, the voltage may drop, corrupting the logic level and potentially causing the entire system to malfunction. When designing circuits, checking the datasheet is a golden rule.
Set inputA and inputB to HIGH (1) or LOW (0) using toggle switches
Select a logic gate type from the dropdown: AND, OR, XOR, NAND, NOR, or XNOR
Observe the output LED indicator and auto-generated truth table updating in real-time
Chain multiple gates by connecting output pins to subsequent gate inputs for complex circuits
Use the flip-flop module to add state-dependent behavior with clock and reset controls
Worked Example
Design a half-adder circuit for binary addition. Configure two XOR gates and one AND gate: inputA=1, inputB=1 produces Sum=0 (XOR output) and Carry=1 (AND output). For inputA=1, inputB=0: Sum=1 and Carry=0. A full-adder extends this by cascading two half-adders with an OR gate, enabling 3-bit addition in digital signal processors and arithmetic logic units.
Practical Notes
Use SR flip-flops (Set-Reset) in sequential circuits requiring memory, such as latches in microcontroller reset logic where inputA=Set and inputB=Reset
NAND and NOR gates are universal gates; any logic function can be constructed using only NAND or NOR combinations, critical for ASIC design optimization
Propagation delay between cascaded gates increases total circuit latency; test timing-critical paths in multiplexer and decoder designs
Verify truth tables match Karnaugh maps before synthesizing to HDL (Verilog/VHDL) for FPGA implementation