How is board conductivity modelled?

A board is stacked FR-4 and copper, so it's treated as anisotropic, with very different in-plane and through-plane conductivities. In-plane is the thickness-weighted average of layer conductivities; through-plane is the series sum of layer resistances. A 1.6 mm board with four 35 µm inner planes gave 40 W/mK in-plane and 0.35 W/mK through-plane.

How much do more copper layers help?

With a 1 W, 5 mm component at the centre of a 50 mm board cooled on both sides by natural convection (10 W/m²K), the rise was 62 K for a 2-layer board with 30% surface copper, 37 K with full surface copper, 34 K for 4 layers with two inner planes and 30 K for 6 layers with four. Copper layers spread heat across the board.

Does adding copper keep lowering temperature?

No. Even with heat fully spread, it must still leave the board surface to the air. For a 50 mm board, both sides, 10 W/m²K, a uniform board still rises 20 K. Going lower requires a bigger board, airflow or a heat sink — improving the air side.

Board-Level Thermal Analysis

Category: Thermal – Electronics Cooling | Revised 2026-10-01

CAE visualization for board level thermal theory - technical simulation diagram

Substrate-Level Thermal Analysis

Theory: the board as a heat spreader

Overview

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In board thermal analysis, must copper traces and planes be modelled in detail?

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Usually an effective conductivity reflecting each layer's copper suffices — but treating the board as anisotropic is essential, since in-plane and through-plane conductivities differ completely. Copper spreads heat well in-plane, but through-plane heat must cross FR-4 layers. The number of copper layers sets how far heat spreads around a hot component, and with it the component temperature. Let's calculate a 1 W component on a 50 mm board.

Effective conductivity

$$ k_{\parallel} = \frac{\sum_i k_i t_i}{\sum_i t_i},\qquad k_{\perp} = \frac{\sum_i t_i}{\sum_i t_i/k_i} $$

In-plane is parallel, through-plane series. Even a few percent of copper (390 W/mK) by thickness multiplies in-plane conductivity tens of times, while through-plane remains set by FR-4 (0.3 W/mK).

Spreading in the plate

$$ k_{\parallel}t\,\nabla^2 T - 2h\,(T - T_\infty) + q''_{src} = 0,\qquad \Delta T_{min} = \frac{Q}{2hA_{board}} $$

The board is solved in 2D as a thin plate (fin) losing heat from both faces. The rise $\Delta T_{min}$ for a uniformly hot board is a floor that no amount of spreading can beat.

Coffee Break Trivia

When boards became heat paths

In older electronics, component heat left mainly to the surrounding air. As surface-mount parts shrank and designs soldered bottom thermal pads to the board, most heat began flowing into the board. In board thermal design, copper planes placed for power and ground become the main heat spreaders too, so entering the stack-up and copper content correctly became essential.

Worked example: 1 W at the centre of a 50 mm board

1.6 mm thick; FR-4 0.8 in-plane, 0.3 through-plane W/mK; 35 µm copper. A 5 mm, 1 W component; both faces lose heat to 25 °C air; solved as a 2D plate ignoring through-thickness gradients.

Stack-up	In-plane	Through-plane	Peak rise h = 10	Peak rise h = 30
2-layer, 30% surface copper	5.9 W/mK	0.31 W/mK	61.7 K	42.4 K
2-layer, full surface copper	17.8 W/mK	0.31 W/mK	36.8 K	20.5 K
4-layer, two inner planes	22.9 W/mK	0.33 W/mK	33.9 K	17.8 K
6-layer, four inner planes	40.0 W/mK	0.35 W/mK	29.6 K	13.7 K

Heat transfer coefficients in W/m²K. The floor for a uniformly hot board is 20 K at h = 10 and 6.7 K at h = 30.

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Under natural convection, even 6 layers only reach 30 K, already near the 20 K floor.

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Board temperature rise has two stages: spreading heat around the component, and releasing it from the board surface to air. More copper layers improve the first, cutting 62 K (2-layer, 30% copper) to 30 K. But the second depends only on board area and h; at natural-convection 10 W/m²K a fully spread board still rises 20 K, leaving the 6-layer board only 10 K to gain. With airflow (h = 30) every stack-up drops a lot — 14 K for 6 layers. Identifying the bottleneck is the first step of thermal design.

Analysis tips

Compute in-plane and through-plane effective conductivities from each layer's copper thickness and coverage.
Model thermal vias and pads in detail under hot components.
Compare with the uniform-board floor to find the bottleneck.
Inside enclosures, use the internal air temperature, which is elevated.
Solve the whole board, including mutual heating between neighbouring parts.

Coffee Break Trivia

“Splitting a power plane made it hotter”

In one board revision, inner planes were finely split to add power rails, and a hot component ran over 10 K hotter. Electrically the change was fine, but the fragmented planes broke the in-plane heat-spreading path. Moving the splits away from hot components to preserve a heat path restored the temperature. Layout changes affect heat too.

Common mistakes

Mistakes and fixes

Mistake	Effect	Fix
Isotropic board	Through-plane overrated	Use anisotropy
FR-4-only conductivity	Temperatures too high	Include copper
Assuming 100% coverage	Temperatures too low	Actual coverage
Adding copper, ignoring air side	Diminishing returns	Compare with the floor
Ignoring plane splits	Local hot spots	Reflect actual pattern

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I'd like to learn related topics.

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Try the PCB thermal tool. Related pages include thermal vias, LED thermal design, compact thermal models and junction temperature.

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