Estimate single-ended and differential impedance from trace width, edge-to-edge spacing, reference-plane height and relative permittivity. This surface-microstrip model assumes zero copper thickness.
Parameters
Trace width W
mm
Trace spacing S
mm
Substrate height H
mm
Dielectric constant ε_r
—
IPC-2141A simplified formulas (copper thickness T = 0, surface microstrip) are used.
Results
—
Single-ended Z_0
—
Differential Z_diff
—
Odd-mode Z_odd
—
Even-mode estimate Z_even
Differential Pair Cross Section and Z_diff vs S/H
Top = cross-section of the pair (W, S, H, substrate) / Bottom = Z_diff versus S/H (red dot = current point, dashed = USB 90 ohm / HDMI 100 ohm targets)
Theory & Key Formulas
Z0 = 87 / √(εr + 1.41) × ln(5.98H / 0.8W)
k = 0.48 exp(−0.96 S/H)
Zdiff = 2Z0(1 − k); Zodd = Zdiff / 2
Zeven ≈ Z0(1 + k)
Two equal-width surface traces run above a continuous reference plane. H is the dielectric distance to that plane, not necessarily total board thickness. S is the edge-to-edge gap, not the center-to-center pitch.
Model and input definitions
Two equal-width surface traces run above a continuous reference plane. H is the dielectric distance to that plane, not necessarily total board thickness. S is the edge-to-edge gap, not the center-to-center pitch.
Reproduce a result
Enter W, S and H in mm, using the actual reference plane in the PCB stackup.
Set relative permittivity εr and read Z0, Zdiff and Zodd. Copper thickness and solder mask are omitted.
Increase only S to see coupling weaken and differential impedance approach 2Z0.
Worked example
For W=S=H=0.20 mm and εr=4.3, Z0=87/√5.71×ln(7.475)=73.2 Ω. The coupling factor is k=0.48 exp(−0.96)=0.1838, so Zdiff=2Z0(1−k)=119.6 Ω and Zodd=59.8 Ω. Doubling the gap reduces coupling; it does not double differential impedance.
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What should I check in this example?
🎓
Change one input at a time and compare the formula with the displayed result. Increase only S to see coupling weaken and differential impedance approach 2Z0.
Limits and interpretation
No result is shown when the logarithm argument is at or below one. Passing this check does not establish approximation accuracy. The even-mode field is only a symmetric-correction estimate, not an independent even-mode field solution. Verify manufacturing values with the board supplier or a field solver including copper, mask, frequency dependence and tolerances.
Frequently asked questions
No. Targets and tolerances depend on the interface, generation, routing segment and device. Consult the applicable device design documentation.
H is the dielectric distance from the trace to the reference plane immediately below it. On multilayer boards it usually differs from overall thickness.
No. This page models surface microstrip. A trace between two reference planes requires a different model.
The model omits finite copper thickness, solder mask, frequency-dependent permittivity, fabrication tolerances and discontinuities such as vias and connectors.
Checks cover displayed units, reference calculations, input sensitivity, boundary conditions and cross-language results. They do not certify code compliance or real-world accuracy.
