Low-Pass Filter Back
Signal Processing Simulator

Low-Pass Filter Simulator — 1st-Order RC, Low-Frequency Pass / Noise Smoothing

Visualize the frequency response of a first-order RC low-pass filter set by R and C. Inspect cutoff, gain, phase and time constant with a live Bode plot and circuit waveforms.

Parameters
Resistance R
Ω
Capacitance C
nF
Observation frequency f
Hz
Quantization bits N
bit
Results
Cutoff frequency f_c
Gain at observation f
Phase
Time constant τ = RC
SNR (theory):
RC low-pass circuit (I/O waveforms)
Bode plot (magnitude)
Theory & Key Formulas

Transfer function:

$$H(j\omega) = \dfrac{1}{1 + j\omega\tau},\quad \tau = R\,C$$

Cutoff frequency, gain and phase:

$$f_c = \dfrac{1}{2\pi R C},\quad |H(f)|_{\rm dB} = -20\log_{10}\!\sqrt{1+(f/f_c)^2},\quad \phi = -\arctan(f/f_c)$$

At $f = f_c$, $|H| = 1/\sqrt{2}\approx -3.01\,\text{dB}$ and the phase is $-45°$. For $f \gg f_c$ the magnitude rolls off at -20 dB/decade.

What is a first-order RC low-pass filter?

🙋
How can just a resistor and a capacitor only let low frequencies pass? It looks too simple.
🎓
Roughly speaking, a capacitor looks like a short circuit for fast changes. High-frequency signals leak through C to ground, while low frequencies see C as nearly open, so the input voltage appears at the output. That asymmetry is what selects low frequencies.
🙋
Does -3 dB at f_c mean the signal is roughly halved?
🎓
Half in power and 1/sqrt(2) (~0.707) in amplitude. It is the conventional boundary that says "from here, attenuation begins". In practice you place f_c just above the highest useful signal frequency.
🙋
Where would I actually use a simple RC low-pass in industry?
🎓
Anti-aliasing in front of an ADC, ripple removal after a PWM output, high-frequency noise suppression on sensor lines, simple treble cut in audio, and many more. If you need a sharp stopband you cascade higher-order or pair it with a digital FIR.

Physical model and key equations

Applying Kirchhoff's voltage law and $i_C = C\,dV_{out}/dt$ to the series RC network gives a first-order linear ODE for the output voltage.

$$RC\,\dfrac{dV_{out}}{dt} + V_{out} = V_{in}$$

Substituting $s = j\omega$ yields the transfer function $H(j\omega) = 1/(1+j\omega\tau)$, from which the gain and phase follow.

$$|H(f)| = \dfrac{1}{\sqrt{1+(f/f_c)^2}},\quad \phi = -\arctan(f/f_c),\quad f_c = \dfrac{1}{2\pi RC}$$

In decibel form, the response is 0 dB for $f \ll f_c$, exactly -3.01 dB at $f = f_c$, and asymptotes to -20 dB/decade. The phase moves monotonically from 0° down to -90°.

Real-world applications

ADC anti-aliasing: Place an RC before the converter so that components above the Nyquist frequency are attenuated and do not fold back.

PWM smoothing: Convert a microcontroller PWM output into a pseudo-analog voltage with f_c well below the switching frequency.

Sensor signal conditioning: Strip out high-frequency noise from strain gauges and thermocouples while keeping the slow measurement value.

Audio shaping: A simple high-cut to soften harshness in a tweeter network or as part of room correction.

Common misconceptions and caveats

Myth 1: above f_c the signal is fully blocked. A first-order RC only drops at 20 dB/decade. At f = 10 f_c you get -20 dB, at 100 f_c only -40 dB. For sharp rejection you need higher-order or digital filters.

Myth 2: just make R and C huge to kill all noise. Bigger R reduces drive strength and increases thermal noise $\sqrt{4k_BTR\Delta f}$. Low-noise designs balance impedance carefully.

Myth 3: phase can be ignored. In control loops and audio, the -45° lag at f_c is large enough to compromise stability or perceived clarity.

FAQ

The step response reaches 63.2% in one τ. The 10–90% rise time is about 2.2 τ. For τ = 100 μs the rise time is roughly 220 μs.
The stopband slope becomes -40 dB/decade. Choosing a damping ratio ζ near 0.7 gives a flat passband with no overshoot and a smooth group delay.
An active filter using an op-amp isolates the load, allows independent gain and Q, and supports complex pole pairs. A passive RC is simpler and lower power but has limited drive capability.

How to Use

  1. Adjust the resistance slider (slR) from 10 Ω to 100 kΩ to modify the time constant and cutoff frequency.
  2. Set capacitance from 1 nF to 100 μF and sweep the observation frequency from 1 Hz to 1 MHz.
  3. Use the Bode plot to compare gain attenuation and phase lag against the cutoff frequency.

Worked Example

Configure a 10 kΩ resistor with a 100 nF capacitor: τ = 1 ms and f_c ≈ 159.2 Hz. At 159 Hz the gain is about −3 dB, and at 10 kHz it is about −36 dB with phase close to −89°. For high-frequency noise reduction, R = 1 kΩ and C = 10 nF gives f_c ≈ 15.9 kHz, with about −20 dB or lower gain from 159 kHz upward.

Practical Notes

  1. Select R and C to position f_c one decade below the highest signal frequency you must preserve; for 10 kHz data acquisition, target f_c near 1–2 kHz using matched tolerances (±1% metal-film resistors, C0G capacitors).
  2. Account for parasitic capacitance in PCB traces and op-amp input impedance; add 5–10 pF margin when dimensioning C_nF for precision instrumentation.
  3. At f_c, the filter exhibits −3 dB attenuation and −45° phase shift; use this point to verify simulation against LTspice transient models of real RC networks.
  4. In noisy environments, cascade two identical stages (second-order Butterworth) to achieve −40 dB/decade rolloff; adjust individual R₁C₁ and R₂C₂ pairs slightly to maintain flat passband (Sallen-Key topology).