Power Electronics Switching EMI Analysis — Predicting and Mitigating dV/dt-Induced Conducted and Radiated Noise via CAE

Category: Electromagnetic Analysis | Revised 2026-09-30
Power electronics switching EMI spectrum analysis showing dV/dt waveform and frequency domain envelope with CISPR 25 limit line
Switching EMI Analysis: dV/dt waveform in time domain (left) and spectral envelope in frequency domain (right) compared with CISPR 25 limit line

Mechanism: the trapezoidal wave makes the noise

Overview

🙋

We switched to SiC MOSFETs and efficiency went up, but now we fail the EMI test around 30 MHz. Why?

🎓

Because switching got faster. The switch voltage is a trapezoidal wave with finite rise and fall times. Its spectrum drops steeply above a certain frequency, and that corner is set by the rise time. Switching faster moves the corner up, so components at tens of MHz that used to be small now survive. Lower loss means more noise — the basic power-electronics trade-off.

Spectrum of a trapezoidal wave

$$ |V_n| \le 2VD \cdot \min\!\left(1,\ \frac{1}{\pi f D T}\right)\cdot \min\!\left(1,\ \frac{1}{\pi f t_r}\right) $$

$V$ is the voltage amplitude, $D$ the duty ratio, $T$ the switching period and $t_r$ the rise time. The spectral envelope is flat up to $1/(\pi D T)$, falls inversely with frequency (−20 dB per decade) up to $1/(\pi t_r)$, and falls with the square of frequency (−40 dB per decade) beyond.

Differential mode and common mode

$$ I_{CM} = C_p\,\frac{dV}{dt} $$

Differential-mode noise flows in opposite directions on the supply and return lines and comes mainly from switching-current ripple. Common-mode noise flows in the same direction on both lines and returns through the chassis or earth; it arises when the voltage change $dV/dt$ drives the parasitic capacitance $C_p$ between the switching node and the heatsink or enclosure.

Coffee Break Trivia

Standards born from radio interference

Conducted-emission limits start at 150 kHz and radiated emissions are measured from 30 MHz because the original goal was to protect radio broadcasting. The international committee CISPR set measurement methods and limits so that noise from appliances and machinery would not disturb AM, FM and radio communication. Later standards addressed interference among electronics inside vehicles, so an EV inverter must not disturb the car's own radio and communications. The frequency ranges and the frequency-dependent limits come from the needs of the receivers being protected.

Worked examples

Example 1: rise time and noise level

Spectral envelope of a 400 V, 100 kHz, 50% duty trapezoidal wave (dBμV). The first corner, 63.7 kHz, is common to all cases.

Rise timedV/dtSecond corner1 MHz10 MHz30 MHz100 MHz
50 ns8 kV/μs6.4 MHz148.1124.2105.184.2
10 ns40 kV/μs31.8 MHz148.1128.1118.698.2
2 ns200 kV/μs159 MHz148.1128.1118.6108.1
🙋

No difference at all at 1 MHz, but 13.5 dB at 30 MHz.

🎓

Right. Rise time matters only above the second corner. Going from 50 ns to 10 ns adds 13.5 dB at 30 MHz and 14 dB at 100 MHz; going to 2 ns adds another 10 dB at 100 MHz. Thinking of low-frequency conducted noise as set by switching frequency and duty, and high-frequency radiated noise as set by rise time, makes countermeasures easier to target. The envelope is an upper bound — actual harmonics have nulls — so don't judge from a single frequency.

Example 2: parasitic capacitance and common-mode current

Parasitic capacitance50 ns (8 kV/μs)10 ns (40 kV/μs)
20 pF0.16 A0.80 A
50 pF0.40 A2.0 A
100 pF0.80 A4.0 A

Peak common-mode current for a 400 V transition. The insulation between a power module and its heatsink often has tens to hundreds of pF. Countermeasures are to reduce that capacitance (thicker insulation, less copper area on the switching node) or to give the current a short return path that keeps it inside the enclosure.

Example 3: filter attenuation

$$ f_c = \frac{1}{2\pi\sqrt{L C}}, \qquad \text{IL} \approx 40\log_{10}\!\left(\frac{f}{f_c}\right)\ \text{dB}\quad (f > f_c) $$

A 1 mH common-mode choke with two 4.7 nF Y-capacitors (9.4 nF total) gives a corner of 51.9 kHz. Ideal attenuation is 18 dB at 150 kHz, 51 dB at 1 MHz and 91 dB at 10 MHz. Real chokes lose effectiveness above a few MHz because of interwinding capacitance, and Y-capacitors stop working at high frequency because of lead inductance. Do not expect 91 dB at 10 MHz.

Larger Y-capacitors help, but they pass leakage current at mains frequency: 0.16 / 0.34 / 0.72 mA for 2.2 / 4.7 / 10 nF at 230 V, 50 Hz. Each equipment class has a leakage limit, so capacitance is chosen within the safety standard's constraint.

Analysis and mitigation workflow

Analysis steps

  1. Obtain switching waveforms by circuit simulation including parasitic inductance and capacitance. Ideal models miss the ringing on edges.
  2. For conducted noise, connect a line impedance stabilisation network (LISN) model on the supply side and FFT its terminal voltage.
  3. For radiated noise, feed the circuit waveforms into a 3D electromagnetic model of board, cables and enclosure. Cables are usually the largest antenna.
  4. Compare with measurement; the difference indicates measurement scatter and unknown parasitics.

Mitigation priorities

  • Suppress the source: minimise the switching loop area to reduce ringing from parasitic inductance. Slowing edges with gate resistance trades against loss.
  • Break the path: reduce copper on the switching node to cut parasitic capacitance, and return common-mode current inside the enclosure.
  • Filter: add filtering last. At high frequency, component parasitics and layout decide effectiveness, so keep input and output wiring apart.
Coffee Break Trivia

“A bigger filter made it worse”

A familiar story: conducted emissions exceed the limit near 10 MHz, a bigger choke is fitted, and things get worse. A bigger choke has more turns and more interwinding capacitance, so its self-resonance drops and at 10 MHz it behaves like a capacitor, letting noise straight through. At high frequencies, components and layout with small parasitics beat bigger components. If filter input and output wiring run close together, capacitive coupling bypasses the filter too.

Common mistakes

Mistakes and fixes

MistakeEffectFix
Ideal switches in simulationRinging and HF content missedInclude parasitic L, C and device models
Speeding edges without layout workTens-of-MHz noise risesReduce loop area and parasitic capacitance together
Trusting ideal filter attenuationShortfall above a few MHzEvaluate self-resonance and layout
Oversized Y-capacitorsLeakage exceeds the limitSize from the safety limit
Omitting cables from the modelRadiated emission underestimatedModel cables and enclosure
🙋

I'd like to try the spectrum and filter behaviour myself.

🎓

Use the FFT spectrum tool for waveform versus spectrum, the low-pass filter simulator and RLC resonance simulator for filters and resonance, and the buck converter ripple calculator for ripple. For source-side measures see snubber circuits, parasitic inductance and gate driver design.

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Related Fields

Co-simulationStructural AnalysisThermal Analysis
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